学 术 报 告 会

题 目：Fast 3D EM Simulation for Digital System IC-Package-System Co-design

报告人：Dr. Ji Zheng

　Director of Engineering at Apache Design Solutions (San Jose, CA).

时  间：2009年12月28日（星期一）下午14：30

地  点：电三楼314电子工程与信息科学系（六系）第一会议室

主 办：电子工程与信息科学系

报告内容：

Due to the continued scaling of integrated circuit technology to reach the nodes 32nm and 28 nm, and the reduction of supply voltage, as well as the increasing of IC functions and operation speed, the cost and system risk have shifted its focus on off-chip design such as package and PCBs. Traditional method using simplified model of IC, package and PCB power ground network will result in gross error in the effective inductance hence, on-chip dynamic voltage drop analysis. An IC-Package-PCB co-analysis methodology based on the rigorous die modeling and integration into 3D fullwave EM simulation will be presented.